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[/] [ethmac/] [tags/] [rel_4/] [bench/] [verilog/] - Rev 117

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Last modification

  • Rev 117 2002-07-19 14:02:47 GMT
  • Author: mohor
  • Log message:
    Clock mrx_clk set to 2.5 MHz.
Path Last modification Log RSS feed
[FOLDER] branches/ 1  8407d 12h View Log RSS feed
[FOLDER] tags/ 3  8407d 12h View Log RSS feed
[FOLDER] trunk/ 117  7922d 20h mohor View Log RSS feed

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