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[/] [minsoc/] [tags/] [release-1.0/] [backend/] [altera_3c25_board/] - Rev 99

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Last modification

  • Rev 99 2011-09-12 09:30:45 GMT
  • Author: rfajardo
  • Log message:
    backend/altera_3c25_board/minsoc_defines.v: if GENERIC_FPGA selected, undefine ALTERA_FPGA and FPGA_FAMILY to avoid vendor specific code to flow into the simulation. If you don't do it, generate_bench fails.
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[FOLDER] minsoc/ 99  4600d 04h rfajardo View Log RSS feed
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[NODE][FOLDER] tags/ 42  4780d 23h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] release-0.9/ 42  4780d 23h rfajardo View Log RSS feed
[NODE][FOLDER] trunk/ 99  4600d 04h rfajardo View Log RSS feed

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