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[/] [minsoc/] [trunk/] - Rev 99

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Last modification

  • Rev 99 2011-09-12 09:30:45 GMT
  • Author: rfajardo
  • Log message:
    backend/altera_3c25_board/minsoc_defines.v: if GENERIC_FPGA selected, undefine ALTERA_FPGA and FPGA_FAMILY to avoid vendor specific code to flow into the simulation. If you don't do it, generate_bench fails.
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[NODE][FOLDER] trunk/ 99  4468d 19h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] backend/ 99  4468d 19h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] bench/ 71  4593d 18h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] doc/ 49  4642d 14h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] prj/ 97  4468d 19h rfajardo View Log RSS feed
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