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[/] [minsoc/] [trunk/] [rtl/] [verilog/] - Rev 163

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  • Rev 163 2012-01-26 10:02:25 GMT
  • Author: rfajardo
  • Log message:
    Adjusting internal initiator array widths. They were 1 bit too large. Thanks to R. Diez report.

    These arrays abstract the complete initiator inputs. This way it is easier to route and arbiter using a single input.

    Also removing 2 sequential delays. I didn't design them, so I can't tell if they were really useful/good.
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[FOLDER] minsoc/ 163  4335d 08h rfajardo View Log RSS feed
[NODE][FOLDER] branches/ 153  4394d 07h rfajardo View Log RSS feed
[NODE][FOLDER] tags/ 151  4394d 08h rfajardo View Log RSS feed
[NODE][FOLDER] trunk/ 163  4335d 08h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] backend/ 159  4354d 07h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] bench/ 162  4341d 03h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] doc/ 101  4462d 11h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] prj/ 158  4355d 23h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 163  4335d 08h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] verilog/ 163  4335d 08h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] minsoc_startup/ 12  5153d 00h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] altera_pll.v 63  4607d 01h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] interconnect_defines.v 158  4355d 23h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] minsoc_clock_manager.v 62  4607d 08h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] minsoc_onchip_ram.v 7  5181d 02h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] minsoc_onchip_ram_top.v 7  5181d 02h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] minsoc_tc_top.v 163  4335d 08h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] minsoc_top.v 158  4355d 23h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] minsoc_xilinx_internal_jtag.v 2  5195d 07h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] timescale.v 70  4596d 08h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] xilinx_dcm.v 88  4477d 01h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] sim/ 149  4394d 08h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] sw/ 158  4355d 23h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] syn/ 141  4400d 08h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] utils/ 161  4354d 06h rfajardo View Log RSS feed

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