OpenCores
URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] [trunk/] [sim/] [run/] - Rev 34

Rev

Go to most recent revision | Changes | View Log | RSS feed

Last modification

  • Rev 34 2010-10-15 14:35:25 GMT
  • Author: rfajardo
  • Log message:
    start_server changed: '-t' option of adv_jtag_bridge for vpi connection on simulation removed. or1200_v3 will not pass on CPU self test.

    FAQ completed with asked questions since Februrary 2010.

    INSTALL informs bsdl files only have to be copied to home directory for Xilinx devices.

    synthesis_examples title includes Minimal OpenRISC System on Chip.
Path Last modification Log RSS feed
[FOLDER] minsoc/ 34  4021d 01h rfajardo View Log RSS feed
[NODE][FOLDER] branches/ 1  4413d 06h root View Log RSS feed
[NODE][FOLDER] tags/ 1  4413d 06h root View Log RSS feed
[NODE][FOLDER] trunk/ 34  4021d 01h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] backend/ 15  4358d 22h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] bench/ 28  4184d 01h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] doc/ 34  4021d 01h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 33  4029d 03h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] sim/ 34  4021d 01h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] bin/ 31  4098d 08h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] results/ 2  4413d 04h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] run/ 34  4021d 01h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] generate_bench 30  4141d 06h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] run_bench 30  4141d 06h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] start_server 34  4021d 01h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] sw/ 11  4378d 01h rfajardo View Log RSS feed

powered by: WebSVN 2.1.0

© copyright 1999-2021 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.