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https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk
Subversion Repositories mod_sim_exp
[/] [mod_sim_exp/] [trunk/] [rtl/] [vhdl/] [core/] - Rev 10
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Last modification
- Rev 10 2012-10-23 13:42:32 GMT
- Author: JonasDC
- Log message:
- changed signal input port names to correct name