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Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] [trunk/] [rtl/] [vhdl/] [core/] - Rev 7

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Last modification

  • Rev 7 2012-10-23 11:15:22 GMT
  • Author: JonasDC
  • Log message:
    Modified the architecture, no longer uses Xilinx primitive, instead generic instantiation
    added descriptive comments
Path Last modification Log RSS feed
[FOLDER] mod_sim_exp/ 7  3989d 02h JonasDC View Log RSS feed
[NODE][FOLDER] branches/ 1  3995d 23h root View Log RSS feed
[NODE][FOLDER] tags/ 1  3995d 23h root View Log RSS feed
[NODE][FOLDER] trunk/ 7  3989d 02h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] bench/ 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 7  3989d 02h JonasDC View Log RSS feed
[NODE][NODE][NODE][FOLDER] vhdl/ 7  3989d 02h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] core/ 7  3989d 02h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] adder_block.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] adder_n.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] autorun_cntrl.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] cell_1b.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] cell_1b_adder.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] cell_1b_mux.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] counter_sync.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] d_flip_flop.vhd 4  3989d 04h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] fifo_primitive.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] first_stage.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] last_stage.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] modulus_ram.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] mod_sim_exp_pkg.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] mont_ctrl.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] mont_mult_sys_pipeline.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] multiplier_core.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] operands_sp.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] operand_dp.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] operand_mem.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] operand_ram.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] register_1b.vhd 6  3989d 02h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] register_n.vhd 7  3989d 02h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] standard_cell_block.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] standard_stage.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] stepping_logic.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] systolic_pipeline.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] x_shift_reg.vhd 3  3989d 18h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] interface/ 2  3994d 00h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] sim/ 5  3989d 02h JonasDC View Log RSS feed

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