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[/] [qspiflash/] [trunk/] [bench/] [cpp/] - Rev 14

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Last modification

  • Rev 14 2017-05-08 12:20:48 GMT
  • Author: dgisselq
  • Log message:
    Updates: little-big endian, various other fixes

    1. Made the wbqspiflash.v and llqspi.v files compile with default_nettype none
    2. Changed the internal flash representation to big endian. A little-big
    endian conversion is now required when writing to the flash from a PC.
    3. Simplified the address description via w_wb_addr and w_spif_addr, so that
    the core is more flexible when changing sizes.
    4. Removed the dependence upon the WB_CYC line ... as part of the WB
    simplifications I've been doing.
    5. Got XIP working for the EQSPI flash (I guess --- it's been a while since
    I made those changes)
    6. Adjusted (fixed) sim of read/writes to the volatile config register
    (necessary for XIP)
Path Last modification Log RSS feed
[FOLDER] qspiflash/ 14  2516d 11h dgisselq View Log RSS feed
[NODE][FOLDER] branches/ 1  3241d 03h root View Log RSS feed
[NODE][FOLDER] tags/ 1  3241d 03h root View Log RSS feed
[NODE][FOLDER] trunk/ 14  2516d 11h dgisselq View Log RSS feed
[NODE][NODE][FOLDER] bench/ 14  2516d 11h dgisselq View Log RSS feed
[NODE][NODE][NODE][FOLDER] cpp/ 14  2516d 11h dgisselq View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] eqspiflashsim.cpp 14  2516d 11h dgisselq View Log RSS feed
[NODE][NODE][NODE][NODE][H-FILE] eqspiflashsim.h 14  2516d 11h dgisselq View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] eqspiflash_tb.cpp 12  2786d 02h dgisselq View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] Makefile 13  2719d 01h dgisselq View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] qspiflashsim.cpp 9  2803d 02h dgisselq View Log RSS feed
[NODE][NODE][NODE][NODE][H-FILE] qspiflashsim.h 9  2803d 02h dgisselq View Log RSS feed
[NODE][NODE][FOLDER] doc/ 14  2516d 11h dgisselq View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 14  2516d 11h dgisselq View Log RSS feed

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