URL https://opencores.org/ocsvn/uart_fifo_cpu_if_sv_testbench/uart_fifo_cpu_if_sv_testbench/trunk

Subversion Repositories uart_fifo_cpu_if_sv_testbench

[/] - Rev 4

Rev 4 2011-01-04 08:22:09 GMT
Author: andrewbridger
Log message:
Several SV testbench fixes. Testbench and DUT now elaborate sucessfully in the simulator.

Path	Last modification			Log	RSS feed
uart_fifo_cpu_if_sv_testbench/	4	4851d 11h	andrewbridger	View Log	RSS feed