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[/] [zipcpu/] [trunk/] [rtl/] [core/] - Rev 3

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Last modification

  • Rev 3 2015-07-27 14:45:57 GMT
  • Author: dgisselq
  • Log message:
    Rebuilt the pipefetch (instruction fetch/cache module) so that it will
    let go of the bus if the memory unit wants it to execute an instruction.
    Pipefetch will then grab the bus back whtn the memory unit is done, so things
    otherwise continue as they were before.

    Other tweaks were made to try to reduce code complexity.
Path Last modification Log RSS feed
[FOLDER] zipcpu/ 3  3368d 12h dgisselq View Log RSS feed
[NODE][FOLDER] branches/ 1  3369d 11h root View Log RSS feed
[NODE][FOLDER] tags/ 1  3369d 11h root View Log RSS feed
[NODE][FOLDER] trunk/ 3  3368d 12h dgisselq View Log RSS feed
[NODE][NODE][FOLDER] bench/ 2  3369d 05h dgisselq View Log RSS feed
[NODE][NODE][FOLDER] doc/ 2  3369d 05h dgisselq View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 3  3368d 12h dgisselq View Log RSS feed
[NODE][NODE][NODE][FOLDER] aux/ 2  3369d 05h dgisselq View Log RSS feed
[NODE][NODE][NODE][FOLDER] core/ 3  3368d 12h dgisselq View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] cpuops.v 3  3368d 12h dgisselq View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] memops.v 3  3368d 12h dgisselq View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] pipefetch.v 3  3368d 12h dgisselq View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] prefetch.v 2  3369d 05h dgisselq View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] zipcpu.v 3  3368d 12h dgisselq View Log RSS feed
[NODE][NODE][NODE][FOLDER] peripherals/ 2  3369d 05h dgisselq View Log RSS feed
[NODE][NODE][FOLDER] sw/ 2  3369d 05h dgisselq View Log RSS feed

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