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[/] [ethmac/] [tags/] [rel_4/] [rtl] - Rev 58

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Rev Log message Author Age Path
58 File format changed. mohor 8259d 18h /ethmac/tags/rel_4/rtl
57 Format of the file changed a bit. mohor 8259d 18h /ethmac/tags/rel_4/rtl
56 File format fixed a bit. mohor 8259d 18h /ethmac/tags/rel_4/rtl
55 Changed that were lost with last update put back to the file. mohor 8259d 19h /ethmac/tags/rel_4/rtl
54 Addition of new module eth_addrcheck.v billditt 8260d 09h /ethmac/tags/rel_4/rtl
53 Addition of new module eth_addrcheck.v billditt 8260d 09h /ethmac/tags/rel_4/rtl
52 Modified for Address Checking,
addition of eth_addrcheck.v		 billditt 8260d 09h /ethmac/tags/rel_4/rtl
50 checks destination address for Unicast, Multicast and Broadcast ops billditt 8260d 10h /ethmac/tags/rel_4/rtl
48 RxOverRun added to statuses. mohor 8262d 12h /ethmac/tags/rel_4/rtl
47 HASH0 and HASH1 registers added. Registers address width was
changed to 8 bits.		 mohor 8262d 12h /ethmac/tags/rel_4/rtl
46 HASH0 and HASH1 registers added. mohor 8262d 13h /ethmac/tags/rel_4/rtl
43 Tx status is written back to the BD. mohor 8263d 20h /ethmac/tags/rel_4/rtl
42 Rx status is written back to the BD. mohor 8266d 13h /ethmac/tags/rel_4/rtl
41 non-DMA host interface added. Select the right configutation in eth_defines. mohor 8268d 15h /ethmac/tags/rel_4/rtl
40 Both rx and tx part are finished. Tested with wb_clk_i between 10 and 200
MHz. Statuses, overrun, control frame transmission and reception still need
to be fixed.		 mohor 8269d 13h /ethmac/tags/rel_4/rtl
39 Tx part finished. TxStatus needs to be fixed. Pause request needs to be
added.		 mohor 8273d 17h /ethmac/tags/rel_4/rtl
38 Initial version. Equals to eth_wishbonedma.v at this moment. mohor 8282d 19h /ethmac/tags/rel_4/rtl
37 Link in the header changed. mohor 8282d 19h /ethmac/tags/rel_4/rtl
34 RX_BD_NUM changed to TX_BD_NUM (holds number of TX descriptors
instead of the number of RX descriptors).		 mohor 8331d 15h /ethmac/tags/rel_4/rtl
33 ETH_RX_BD_ADR register deleted. ETH_RX_BD_NUM is used instead. mohor 8331d 19h /ethmac/tags/rel_4/rtl
32 ETH_RX_BD_ADR register deleted. ETH_RX_BD_NUM is used instead. mohor 8331d 19h /ethmac/tags/rel_4/rtl
29 Generic memory model is used. Defines are changed for the same reason. mohor 8353d 15h /ethmac/tags/rel_4/rtl
24 Log file added. mohor 8378d 18h /ethmac/tags/rel_4/rtl
23 Number of addresses (wb_adr_i) minimized. mohor 8378d 18h /ethmac/tags/rel_4/rtl
22 eth_timescale.v changed to timescale.v This is done because of the
simulation of the few cores in a one joined project.		 mohor 8378d 21h /ethmac/tags/rel_4/rtl
21 Status signals changed, Adress decoding changed, interrupt controller
added.		 mohor 8379d 17h /ethmac/tags/rel_4/rtl
20 Defines changed (All precede with ETH_). Small changes because some
tools generate warnings when two operands are together. Synchronization
between two clocks domains in eth_wishbonedma.v is changed (due to ASIC
demands).		 mohor 8403d 15h /ethmac/tags/rel_4/rtl
18 Few little NCSIM warnings fixed. mohor 8416d 15h /ethmac/tags/rel_4/rtl
17 Signal names changed on the top level for easier pad insertion (ASIC). mohor 8443d 15h /ethmac/tags/rel_4/rtl
16 "else" was missing within the always block in file eth_wishbonedma.v. mohor 8450d 21h /ethmac/tags/rel_4/rtl

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