URL https://opencores.org/ocsvn/t400/t400/trunk

Subversion Repositories t400

[/] - Rev 24

Rev	Log message	Author	Age	Path
24	finalize test	arniml	6708d 21h	/
23	finalize test	arniml	6709d 12h	/
22	finish test	arniml	6709d 21h	/
21	include t420 system and testbench	arniml	6709d 22h	/
20	initial check-in	arniml	6709d 22h	/
19	moved elements to separate design unit tb_elems	arniml	6709d 22h	/
18	initial check-in	arniml	6709d 22h	/
17	remove direct specification of cpu type	arniml	6710d 22h	/
16	enabled t420 support	arniml	6710d 22h	/
15	initial check-in	arniml	6710d 22h	/
14	t420 hierarchies added	arniml	6710d 22h	/
13	hand-down clock divider option	arniml	6717d 18h	/
12	fix sensitivity list	arniml	6718d 18h	/
11	renamed to rtl	arniml	6718d 18h	/
10	renamed t400_por configuration to rtl	arniml	6718d 18h	/
9	initial check-in	arniml	6718d 18h	/
8	phi1_en_q is dedicated enable for PHI1 clock to suppress glitches on sk_o	arniml	6719d 07h	/
7	remove delta cycle filter on sk_s	arniml	6719d 07h	/
6	initial check-in	arniml	6719d 07h	/
5	initial check-in	arniml	6719d 18h	/
4	remove superfluous testbench	arniml	6719d 18h	/
3	This commit was manufactured by cvs2svn to create tag 'LOC_CVS_0_1'.		6719d 18h	/
2	import from local CVS repository, LOC_CVS_0_1	arniml	6719d 18h	/
1	Standard project directories initialized by cvs2svn.		6719d 18h	/