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[/] [openmsp430/] - Rev 117

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117 To facilitate commercial adoption of the openMSP430, the core has moved to a modified BSD license. olivier.girard 4844d 21h /openmsp430/
116 Update documentation to reflect the latest core updates. olivier.girard 4860d 22h /openmsp430/
115 Add linker script example. olivier.girard 4869d 21h /openmsp430/
114 Improved the VerifyCPU_ID procedure. olivier.girard 4872d 20h /openmsp430/
113 Created ChangeLog files... olivier.girard 4873d 21h /openmsp430/
112 Modified comment. olivier.girard 4877d 20h /openmsp430/
111 Re-organized the "openMSP430_defines.v" file.
Re-defined the CPU_ID register of the debug interface (in particular to support custom user versioning).
Added RTL configuration possibility to expand the peripheral address space from 512B (0x0000 to 0x0200) to up to 32kB (0x0000 to 0x8000).
As a consequence the per_addr bus width goes from 8 to 14 bits and the peripherals address decoders have been updated accordingly.		 olivier.girard 4878d 20h /openmsp430/
110 Rework of the GUI for the software development tools.
Added possibility to give custom information through the omsp_alias.xml file.		 olivier.girard 4879d 20h /openmsp430/
109 Update Xilinx FPGA example with the latest openMSP430 core RTL version. olivier.girard 4933d 05h /openmsp430/
108 Add serial debug interface tasks to the Actel fpga simulation environment. olivier.girard 4934d 18h /openmsp430/
107 Update Actel and Alter FPGA examples with the latest openMSP430 core RTL version. olivier.girard 4934d 18h /openmsp430/
106 Separated the Timer A defines from the openMSP430 ones.
Added the "dbg_en" port in order to allow a separate reset of the debug interface.
Added the "core_en" port (when cleared, the CPU will stop execution, the dbg_freeze signal will be set and the aclk & smclk will be stopped).
Renamed "per_wen" to "per_we" to prevent confusion with active low signals.
Removed to missing unused flops when the DBG_EN is not defined (thanks to Mihai contribution).		 olivier.girard 4934d 19h /openmsp430/
105 Removed dummy memory read access for the MOV/PUSH/CALL/RETI instructions.
These were not problematic but this is simply cleaner that way.		 olivier.girard 4949d 20h /openmsp430/
104 Update all FPGA example projects with the latest RTL version. olivier.girard 4953d 21h /openmsp430/
103 Removed the timescale from all RTL files.
Added possibility to exclude the "includes" statements from the RTL.		 olivier.girard 4955d 02h /openmsp430/
102 Fixed bug reported by Mihai ( http://opencores.org/bug,view,1955 ).
The following PUSH instructions are now working as expected:

- indexed mode: PUSH x(R1)
- indirect register mode: PUSH @R1
- indirect autoincrement: PUSH @R1+		 olivier.girard 4955d 19h /openmsp430/
101 Cosmetic change in order to prevent an X propagation whenever executing a byte instruction with an uninitialized memory location as source. olivier.girard 4955d 20h /openmsp430/
100 Update HTML documentation with Actel's FPGA implementation example (file & directory description section). olivier.girard 4958d 19h /openmsp430/
99 Small fix for CVER simulator support. olivier.girard 4959d 20h /openmsp430/
98 Added support for VCS verilog simulator.
VPD and TRN waveforms can now be generated.		 olivier.girard 4959d 20h /openmsp430/
97 Update Tools' Windows executables with EraseROM command fix. olivier.girard 4960d 20h /openmsp430/
96 Fixed EraseROM command in the TCL library of the Software development tools. olivier.girard 4960d 20h /openmsp430/
95 Update some test patterns for the additional simulator supports. olivier.girard 4963d 20h /openmsp430/
94 Thanks to Mihai-Costin Manolescu's contribution, the simulation scripts now support the following simulators:
- Icarus Verilog
- Cver
- Verilog-XL
- NCVerilog
- Modelsim		 olivier.girard 4963d 20h /openmsp430/
93 Update Tools' Windows executables. olivier.girard 4967d 20h /openmsp430/
92 Fixed bug where the openmsp430-minidebug application shows data memory size instead of program memory size and program memory size instead of data memory size.
Thanks to "dir" for reporting the bug :-)		 olivier.girard 4967d 21h /openmsp430/
91 Fixed bug when an IRQ arrives while CPU is halted through the serial debug interface.
This bug is CRITICAL for people using working with interrupts and the Serial Debug Interface.		 olivier.girard 4967d 21h /openmsp430/
90 Update windows executables for the tools. olivier.girard 4983d 03h /openmsp430/
89 Update the loader tool to support Intel-HEX format. olivier.girard 4983d 03h /openmsp430/
88 Update windows executables for the tools. olivier.girard 4983d 03h /openmsp430/

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