URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [branches/] [unneback/] [bench/] [verilog/] - Rev 342

Rev	Log message	Author	Age	Path
227	Changed BIST scan signals.	tadejm	8015d 02h	/ethmac/branches/unneback/bench/verilog
223	Some code changed due to bug fixes.	tadejm	8015d 05h	/ethmac/branches/unneback/bench/verilog
216	Bist signals added.	mohor	8022d 05h	/ethmac/branches/unneback/bench/verilog
209	Just back-up; not completed testbench and some testcases are not wotking properly yet.	tadejm	8024d 05h	/ethmac/branches/unneback/bench/verilog
194	Full duplex tests modified and testbench bug repaired.	tadej	8043d 04h	/ethmac/branches/unneback/bench/verilog
192	Some additional reports added	tadej	8045d 01h	/ethmac/branches/unneback/bench/verilog
191	Bug repaired in eth_phy device	tadej	8045d 01h	/ethmac/branches/unneback/bench/verilog
189	Simple testbench that includes eth_cop, eth_host and eth_memory modules. This testbench is used for testing the whole environment. Use tb_ethernet testbench for testing just the ethernet MAC core (many tests).	mohor	8045d 02h	/ethmac/branches/unneback/bench/verilog
188	PHY changed.	tadej	8045d 23h	/ethmac/branches/unneback/bench/verilog
182	Full duplex test improved.	tadej	8047d 01h	/ethmac/branches/unneback/bench/verilog