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Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] - Rev 181

Rev	Log message	Author	Age	Path
86	Update serial debug interface test patterns to make them work with all program memory configurations.	olivier.girard	4990d 06h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit
85	Diverse RTL cosmetic updates.	olivier.girard	4990d 08h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit
84	Update SRAM model in the core testbench to prevent the IEEE warning when running simulations. Update watchdog to fix NMI synchronisation problem. Add synchronizers for the PUC signal in the debug interface.	olivier.girard	4995d 09h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit
83	Add Oscilloscope screenshot + link to the original game.	olivier.girard	5041d 09h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit
82	Update Actel example project: - synthesis scripts. - Spacewar demo program. - SVN ignore patterns for diverse directories	olivier.girard	5041d 09h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit
81	Initial synthesis, P&R setup for the Actel example project.	olivier.girard	5044d 07h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit
80	Create initial version of the Actel FPGA implementation example.	olivier.girard	5044d 15h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit