OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] - Rev 568

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
548 New scripts for testing, documentation of testing, fixes to DejaGnu test scripts and updates to scripts. jeremybennett 4865d 05h /openrisc/trunk
547 ORPSoC dbg_if fix for slow Wishbone slaves julius 4867d 06h /openrisc/trunk
546 ORPSoC update: Fix WB B3 bursting termination on error in WB B3 RAM model julius 4867d 23h /openrisc/trunk
545 ORPSoC - revert unecessary i2c fix - driver oneliner was all that was needed. julius 4874d 02h /openrisc/trunk
544 ORPSoC ordb1a3pe1500 update - adding SD card controller. julius 4874d 08h /openrisc/trunk
543 i2c_master_slave bug fix for slave, potentially holding SDA low when master wants to send stop. julius 4874d 09h /openrisc/trunk
542 ORPSoC scripts cleanup. Now centralised.

Documentation updated for ml501's SPI programming, noting issues with ISE12.
julius 4879d 22h /openrisc/trunk
541 uC/OS-II port update - maintain cache settings in SR for new tasks. Thanks to contributor Stefan Kristiansson julius 4882d 04h /openrisc/trunk
540 Ensure the re-entrancy structure is re-initialized on restart. jeremybennett 4883d 00h /openrisc/trunk
539 newlib update - sync exception stack size define between crt0 and or1k-support library julius 4883d 06h /openrisc/trunk

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.