URL https://opencores.org/ocsvn/aemb/aemb/trunk

Subversion Repositories aemb

[/] [aemb/] [tags/] [AEMB_711/] [rtl/] - Rev 72

Rev	Log message	Author	Age	Path
35	Added async BRA/DLY signals for future clock, reset, and interrupt features.	sybreon	6343d 17h	/aemb/tags/AEMB_711/rtl/
34	Corrected speed issues after rev 1.9 update.	sybreon	6344d 07h	/aemb/tags/AEMB_711/rtl/
33	Fixed minor data hazard bug spotted by Matt Ettus.	sybreon	6359d 13h	/aemb/tags/AEMB_711/rtl/
31	Removed byte acrobatics.	sybreon	6359d 13h	/aemb/tags/AEMB_711/rtl/
28	Fixed simulation bug.	sybreon	6362d 14h	/aemb/tags/AEMB_711/rtl/
27	Removed some unnecessary bubble control.	sybreon	6363d 01h	/aemb/tags/AEMB_711/rtl/
26	Fixed minor synthesis bug.	sybreon	6363d 01h	/aemb/tags/AEMB_711/rtl/
25	Added code documentation. Improved size & speed of rtl/verilog/aeMB_aslu.v	sybreon	6363d 05h	/aemb/tags/AEMB_711/rtl/
24	Made minor performance optimisations.	sybreon	6363d 15h	/aemb/tags/AEMB_711/rtl/
23	Fixed minor simulation bug.	sybreon	6364d 07h	/aemb/tags/AEMB_711/rtl/