Rev |
Log message |
Author |
Age |
Path |
567 |
ORPSoC ethmac test and diagnosis software program updates. |
julius |
4809d 02h |
/openrisc/trunk/orpsocv2/sw |
545 |
ORPSoC - revert unecessary i2c fix - driver oneliner was all that was needed. |
julius |
4846d 17h |
/openrisc/trunk/orpsocv2/sw |
542 |
ORPSoC scripts cleanup. Now centralised.
Documentation updated for ml501's SPI programming, noting issues with ISE12. |
julius |
4852d 14h |
/openrisc/trunk/orpsocv2/sw |
535 |
ORPSoC - adding sw tests for l.rfe |
julius |
4868d 15h |
/openrisc/trunk/orpsocv2/sw |
530 |
ORPSoC update
Ethernet MAC Wishbone interface fixes
Beginnings of software update.
ML501 backend script fixes for new ISE |
julius |
4876d 00h |
/openrisc/trunk/orpsocv2/sw |
528 |
ORPSoC SPI flash programming link script bug fix |
julius |
4880d 23h |
/openrisc/trunk/orpsocv2/sw |
506 |
ORPSoC or1200 interrupt and syscall generation test |
julius |
4901d 18h |
/openrisc/trunk/orpsocv2/sw |
505 |
OR1200 overflow detection fixup
SPIflash program update
or1200 driver library timer improvement |
julius |
4901d 19h |
/openrisc/trunk/orpsocv2/sw |
504 |
ORPSoC ALU update with new comparison configuration option, software test for comparisons and register file comment cleanup |
julius |
4918d 14h |
/openrisc/trunk/orpsocv2/sw |
502 |
ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default |
julius |
4921d 14h |
/openrisc/trunk/orpsocv2/sw |
499 |
ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup |
julius |
4923d 11h |
/openrisc/trunk/orpsocv2/sw |
496 |
ORPSoC ml501 updates - increased frequency, updated documentation |
julius |
4925d 21h |
/openrisc/trunk/orpsocv2/sw |
489 |
ORPSoC sw cleanup. Remove warnings. |
julius |
4949d 21h |
/openrisc/trunk/orpsocv2/sw |
488 |
ORPSoC OR1200 driver - tick timer exception handler reverted to generic - cpu tick function hook used as default in handler table. OR1200 timer demo sw for board added. |
julius |
4949d 21h |
/openrisc/trunk/orpsocv2/sw |
487 |
ORPSoC main software makefile update |
julius |
4952d 19h |
/openrisc/trunk/orpsocv2/sw |
486 |
ORPSoC updates, mainly software, i2c driver |
julius |
4952d 19h |
/openrisc/trunk/orpsocv2/sw |
485 |
ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 |
julius |
4957d 00h |
/openrisc/trunk/orpsocv2/sw |
479 |
ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. |
julius |
4975d 04h |
/openrisc/trunk/orpsocv2/sw |
477 |
ORPSoC update - Added ability to enable OR1200 caches up to 32KB, which requires line size of 32bytes and 8-beat Wishbone bursts.
Changed cache sizes of both instruction and data cache of reference design to 4kB each. |
julius |
4977d 03h |
/openrisc/trunk/orpsocv2/sw |
475 |
ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. |
julius |
4977d 23h |
/openrisc/trunk/orpsocv2/sw |