OpenCores
URL https://opencores.org/ocsvn/gpio/gpio/trunk

Subversion Repositories gpio

[/] [gpio/] [trunk/] [bench/] [verilog/] [tb_tasks.v] - Rev 65

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
65 New directory structure. root 5745d 14h /gpio/trunk/bench/verilog/tb_tasks.v
63 reorganice core, add synchronization flops. simont 7443d 03h /gpio/trunk/bench/verilog/tb_tasks.v
56 added ECLK and NEC registers, all tests passed. gorand 7654d 23h /gpio/trunk/bench/verilog/tb_tasks.v
47 small "names" modification... gorand 7672d 00h /gpio/trunk/bench/verilog/tb_tasks.v
41 small changes, to satisfy VATS.. gorand 7682d 22h /gpio/trunk/bench/verilog/tb_tasks.v
37 tests passed. gorand 7691d 13h /gpio/trunk/bench/verilog/tb_tasks.v
22 Fixed two typos. lampret 8376d 19h /gpio/trunk/bench/verilog/tb_tasks.v
21 Added RGPIO_INTS. lampret 8376d 19h /gpio/trunk/bench/verilog/tb_tasks.v
18 Updated timing and fixed some typing errors. lampret 8417d 10h /gpio/trunk/bench/verilog/tb_tasks.v
13 Changed VCD output location. lampret 8474d 19h /gpio/trunk/bench/verilog/tb_tasks.v
12 Changed gpio top level into gpio_top. Changed defines.v into gpio_defines.v. lampret 8474d 20h /gpio/trunk/bench/verilog/tb_tasks.v
8 Changed directory structure, port names and drfines. lampret 8502d 14h /gpio/trunk/bench/verilog/tb_tasks.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.