OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [verilog/] [usbhostslave/] [speedCtrlMux_simlib.v] - Rev 408

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 5152d 09h /openrisc/trunk/orpsocv2/bench/verilog/usbhostslave/speedCtrlMux_simlib.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.