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[/] [or1k/] [branches/] [branch_speed_opt/] [or1200/] [rtl/] [verilog/] [or1200_lsu.v] - Rev 1765

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1765 root 5744d 21h /or1k/branches/branch_speed_opt/or1200/rtl/verilog/or1200_lsu.v
1164 This commit was manufactured by cvs2svn to create branch 'branch_speed_opt'. 7849d 17h /or1k/branches/branch_speed_opt/or1200/rtl/verilog/or1200_lsu.v
788 Some of the warnings fixed. lampret 8283d 05h /or1k/branches/branch_speed_opt/or1200/rtl/verilog/or1200_lsu.v
660 Speed optimizations (removed duplicate _cyc_ and _stb_). Fixed D/IMMU cache-inhibit attr. lampret 8329d 16h /or1k/branches/branch_speed_opt/or1200/rtl/verilog/or1200_lsu.v
589 No more low/high priority interrupts (PICPR removed). Added tick timer exception. Added exception prefix (SR[EPH]). Fixed single-step bug whenreading NPC. lampret 8353d 12h /or1k/branches/branch_speed_opt/or1200/rtl/verilog/or1200_lsu.v
504 New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs. lampret 8368d 12h /or1k/branches/branch_speed_opt/or1200/rtl/verilog/or1200_lsu.v

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