OpenCores
URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [trunk/] [sim/] - Rev 64

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Rev Log message Author Age Path
64 signal es_int=1'b0 simont 8010d 04h /8051/trunk/sim/
63 initial import simont 8010d 04h /8051/trunk/sim/
58 add external rom testing simont 8016d 02h /8051/trunk/sim/
57 add module oc8051_xrom simont 8016d 02h /8051/trunk/sim/
56 initial CVS input simont 8016d 02h /8051/trunk/sim/
55 added parameter DELAY simont 8016d 02h /8051/trunk/sim/
46 prepared header simont 8033d 04h /8051/trunk/sim/
43 remove unused files simont 8033d 06h /8051/trunk/sim/
42 *** empty log message *** simont 8033d 06h /8051/trunk/sim/
41 remove unused files simont 8033d 06h /8051/trunk/sim/
37 added signals ack, stb and cyc simont 8060d 06h /8051/trunk/sim/
19 combinatorial loop removed simont 8074d 02h /8051/trunk/sim/
18 rst signal added simont 8077d 08h /8051/trunk/sim/
4 Code repaired to satisfy the linter; testbech fails markom 8080d 10h /8051/trunk/sim/
2 Initial CVS import simont 8096d 08h /8051/trunk/sim/

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