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[/] [async_sdm_noc/] [branches/] [clos_opt/] [common/] - Rev 60

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Rev Log message Author Age Path
60 try to make the address comparison relaxed QDI wsong0210 4854d 19h /async_sdm_noc/branches/clos_opt/common/
59 address deduction wsong0210 4856d 18h /async_sdm_noc/branches/clos_opt/common/
58 opt ongoing 10/06/2011 wsong0210 4857d 19h /async_sdm_noc/branches/clos_opt/common/
57 insert buffers inside clos wsong0210 4857d 21h /async_sdm_noc/branches/clos_opt/common/
47 merge the VC router to trunk wsong0210 4859d 21h /async_sdm_noc/trunk/common/
37 SDM/wormhole ready wsong0210 4866d 18h /async_sdm_noc/trunk/common/
28 merge the synthesis scripts in the branch init to trunk wsong0210 4871d 18h /async_sdm_noc/trunk/common/
22 roll back wsong0210 4873d 13h /async_sdm_noc/trunk/common/
18 allocators_modify wsong0210 4874d 18h /async_sdm_noc/branches/common/
17 allocators wsong0210 4874d 18h /async_sdm_noc/branches/common/
14 output buffers wsong0210 4875d 18h /async_sdm_noc/branches/common/
12 crossbars wsong0210 4875d 19h /async_sdm_noc/branches/common/
11 arbiters wsong0210 4875d 20h /async_sdm_noc/branches/common/
10 script for async cell lib disable timing arc wsong0210 4877d 21h /async_sdm_noc/branches/common/
9 cell library setting up script wsong0210 4878d 11h /async_sdm_noc/branches/common/
8 update the async cell lib wsong0210 4878d 12h /async_sdm_noc/branches/common/
6 the asynchronous cell library wsong0210 4878d 13h /async_sdm_noc/branches/common/
5 modify the file dir for multiple designs wsong0210 4878d 13h /async_sdm_noc/branches/common/

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