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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

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Rev Log message Author Age Path
85 Bug 1773 (RSP usage with ELF image preloaded) fixed. jeremybennett 5273d 11h /openrisc/
84 Remove duplicated directories. jeremybennett 5273d 11h /openrisc/
83 Fix to use -1 to invalidate cache tags. Suggested by John Alfredo. jeremybennett 5274d 01h /openrisc/
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.		 jeremybennett 5274d 02h /openrisc/
81 Directory no longer used. jeremybennett 5274d 02h /openrisc/
80 Add missing configuration files to SVN. jeremybennett 5274d 05h /openrisc/
79 Fixed retry loop in or_debug_proxy, hopefully more stable when physically resetting the board julius 5286d 06h /openrisc/
78 Fixed typo in Silos workaround script rherveille 5287d 02h /openrisc/
77 Added support for Silvaco's Silos simulator
Added workaround for Silos's exit code behaviour		 rherveille 5287d 02h /openrisc/
76 Added: +libext+.v
Added: +incdir+.		 rherveille 5288d 01h /openrisc/
75 Fixed toolchain script's cygwin ncurses check julius 5293d 04h /openrisc/
74 Toolchain script fix for ncurses header checking julius 5311d 07h /openrisc/
73 toolchain script error fix julius 5311d 08h /openrisc/
72 Toolchain install script: or1ksim location changed, few tweaks julius 5314d 05h /openrisc/
71 ORPSoC board builds, adding readmes julius 5330d 11h /openrisc/
70 ORPSoC cycle accurate trace generation now compatible with latest version of Verilator \(3.800\) - This will break VCD generation on systems which earlier verilator versions\! julius 5334d 16h /openrisc/
69 ORPSoC xilinx ml501 board update - added ethernet eupport and software test julius 5334d 17h /openrisc/
68 Fixed up a couple of Makefile things in ORPSoCv2 julius 5337d 08h /openrisc/
67 New synthesizable builds of ORPSoC - first for the Xilinx ML501 Virtex 5 board, with working Xilinx MIG DDR2 Controller - added new pad option to bin2vmem, moved spi controller from or1k_startup module to its own directory julius 5337d 11h /openrisc/
66 Fixed the simulator-assisted printf l.nop in cycle accurate, and supporting software. julius 5357d 09h /openrisc/

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