Rev |
Log message |
Author |
Age |
Path |
1440 |
Reclasify l.trap and l.sys to be an exception instruction |
nogj |
7119d 23h |
/or1k/tags/nog_patch_65/insight/ |
1384 |
Fix the parameters to the l.ff1/l.maci instructions |
nogj |
7135d 03h |
/or1k/tags/nog_patch_65/insight/ |
1350 |
Mark a simulated cpu address as such, by introducing the new oraddr_t type |
nogj |
7169d 22h |
/or1k/tags/nog_patch_65/insight/ |
1346 |
Remove the global op structure |
nogj |
7183d 01h |
/or1k/tags/nog_patch_65/insight/ |
1344 |
* Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes |
nogj |
7183d 01h |
/or1k/tags/nog_patch_65/insight/ |
1342 |
* Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option. |
nogj |
7183d 02h |
/or1k/tags/nog_patch_65/insight/ |
1341 |
Mark wich operand is the destination operand in the architechture definition |
nogj |
7183d 02h |
/or1k/tags/nog_patch_65/insight/ |
1338 |
l.ff1 instruction added |
andreje |
7199d 00h |
/or1k/tags/nog_patch_65/insight/ |
1333 |
gcc 3.4 compile fix |
phoenix |
7214d 01h |
/or1k/tags/nog_patch_65/insight/ |
1309 |
removed includes |
phoenix |
7371d 19h |
/or1k/tags/nog_patch_65/insight/ |
1308 |
Gyorgy Jeney: extensive cleanup |
phoenix |
7374d 16h |
/or1k/tags/nog_patch_65/insight/ |
1295 |
Updated instruction set descriptions. Changed FP instructions encoding. |
lampret |
7396d 16h |
/or1k/tags/nog_patch_65/insight/ |
1286 |
Changed desciption of the l.cust5 insns |
lampret |
7445d 19h |
/or1k/tags/nog_patch_65/insight/ |
1285 |
Changed desciption of the l.cust5 insns |
lampret |
7445d 19h |
/or1k/tags/nog_patch_65/insight/ |
1256 |
page size is 8192 on or32 |
phoenix |
7530d 19h |
/or1k/tags/nog_patch_65/insight/ |
1169 |
Added support for l.addc instruction. |
csanchez |
7758d 20h |
/or1k/tags/nog_patch_65/insight/ |
1152 |
*** empty log message *** |
phoenix |
7838d 23h |
/or1k/tags/nog_patch_65/insight/ |
1149 |
*** empty log message *** |
phoenix |
7839d 12h |
/or1k/tags/nog_patch_65/insight/ |
1144 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7841d 19h |
/or1k/tags/nog_patch_65/insight/ |
1142 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7842d 09h |
/or1k/tags/nog_patch_65/insight/ |