URL https://opencores.org/ocsvn/rio/rio/trunk

Subversion Repositories rio

[/] [rio/] - Rev 21

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Rev	Log message	Author	Age	Path
21	Branching of a single symbol version of the new RioSerial.	magro732	3963d 15h	/rio/
20	Adding software C-stack and matching VHDL modules.	magro732	4028d 17h	/rio/
19	Removing synthesis warnings.	magro732	4053d 17h	/rio/
18	Making RioSerial entity the same as before+minor fixes.	magro732	4054d 16h	/rio/
17	Removing latch and improving timing.	magro732	4055d 16h	/rio/
16	Removed FIFO between RioSerial and PCS. Transmitter works without idle ticks. Internal symbol fifo increased. Changed readContentEnd_o timing.	magro732	4055d 17h	/rio/
15	All testcases are ok. Still needs some tweeks though.	magro732	4059d 18h	/rio/
14	Most issues solved, testbench issues remains.	magro732	4062d 17h	/rio/
13	Timeouts are working.	magro732	4065d 17h	/rio/
12	Backup of recent work, debugging new RioSerial.	magro732	4076d 16h	/rio/
11	Receiver ready, transmitter is compiling.	magro732	4076d 17h	/rio/
10	Branch to develop support for parallel symbols.	magro732	4076d 17h	/rio/
9	Adding the recently written PCS code, which connects the RioSerial to the Virtex-6 GTX-Quad (4-Lane SerDes)	azdem	4118d 05h	/rio/
8	Adding signal descriptions in comments.	magro732	4161d 18h	/rio/
7	Adding missing generic parameters to RioPacketBuffer.	magro732	4248d 22h	/rio/
6	Adding RioWbBridge. Sorry, no testbench for this one.	magro732	4249d 00h	/rio/
5	Uploading primitive documentation.	magro732	4255d 16h	/rio/
4	Adding protocol engine implementing the hardware independent parts of the LP-serial physical specification.	magro732	4278d 05h	/rio/
3	Adding RioPacketBuffer and testbench.	magro732	4278d 21h	/rio/
2	Adding RioSwitch and testbench.	magro732	4278d 23h	/rio/

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Subversion Repositories rio

[/] [rio/] - Rev 21

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