URL https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk

Subversion Repositories sdhc-sc-core

[/] [sdhc-sc-core/] [trunk/] [src/] [grpSd/] [unitSdData/] - Rev 114

Rev	Log message	Author	Age	Path
113	Read with single block works on cards, but not in simulation. SdData.sv sends data with one "XXXX" cycle right before the crc.	rkastl	5014d 10h	/sdhc-sc-core/trunk/src/grpSd/unitSdData/
111	Sclk moved to neg. edge -> setup and hold times for fast mode are easier to reach. (only micro sd does not work in fast mode).	rkastl	5014d 10h	/sdhc-sc-core/trunk/src/grpSd/unitSdData/
110	All except microsd work in highspeed mode.	rkastl	5014d 10h	/sdhc-sc-core/trunk/src/grpSd/unitSdData/
109	Added a data ram.	rkastl	5014d 10h	/sdhc-sc-core/trunk/src/grpSd/unitSdData/
105	Changing speed works! refs #33	rkastl	5014d 10h	/sdhc-sc-core/trunk/src/grpSd/unitSdData/
103	SdController: Checking speed works	rkastl	5014d 10h	/sdhc-sc-core/trunk/src/grpSd/unitSdData/
101	Receiving response to ACMD51 works including data, refs #33.	rkastl	5014d 10h	/sdhc-sc-core/trunk/src/grpSd/unitSdData/
100	SdController: Receiving data after ACMD51, but CRC is wrong	rkastl	5014d 10h	/sdhc-sc-core/trunk/src/grpSd/unitSdData/
95	SdController: entity and architecture split, all outputs registered SdCardModel: Delay between response and next command added SdData: Busy checking refs #33	rkastl	5014d 10h	/sdhc-sc-core/trunk/src/grpSd/unitSdData/
93	Don´t run a full synthesis for SdData alone. It won´t fit.	rkastl	5014d 10h	/sdhc-sc-core/trunk/src/grpSd/unitSdData/
92	SdData: Sending in standard and wide mode (incl. simple not automated testbench and synthesis), refs #31.	rkastl	5014d 10h	/sdhc-sc-core/trunk/src/grpSd/unitSdData/