URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] - Rev 30

Rev	Log message	Author	Age	Path
30	split out fsm code into seperate modules fixed bugs so that prog_test passes	jt_eaton	5224d 19h	/socgen/
29	removed old files	jt_eaton	5227d 18h	/socgen/
28	added T6502 processor added vga_char_ctrl	jt_eaton	5227d 18h	/socgen/
27	added uart and ps2 host and models added more documentation	jt_eaton	5249d 09h	/socgen/
26	moved install instructions from doc -> tools added scripts to install or32 gnu toolchain and fizzim state tool	jt_eaton	5257d 21h	/socgen/
25	updated for ubuntu 10.4 install	jt_eaton	5258d 13h	/socgen/
24	moved to docs	jt_eaton	5259d 16h	/socgen/
23	fixed typos and ommisions	jt_eaton	5259d 17h	/socgen/
22	added install instructions for ubuntu 10.4	jt_eaton	5259d 17h	/socgen/
21	now use serial_rcvr	jt_eaton	5260d 06h	/socgen/
20	added Nexys2 support expanded docs created tools directory	jt_eaton	5260d 06h	/socgen/
19	added serial_xmit module updated and added docs	jt_eaton	5267d 12h	/socgen/
18	added geda support files and docs	jt_eaton	5272d 11h	/socgen/
17	removed old doc files	jt_eaton	5274d 12h	/socgen/
16	added geda scripts and symbols/sch	jt_eaton	5274d 12h	/socgen/
15	added io_module with ps2 and uart added soc_mouse with uart and mouse interface fixed latch in mrisc	jt_eaton	5280d 15h	/socgen/
14	add web_uploads	jt_eaton	5290d 19h	/socgen/
13	updated for xilinx webpack 11.1	jt_eaton	5298d 09h	/socgen/
12	switched Makefile to use xilinx 11.1 ise removed timescale from synthesis files now use consist timescale header in all sims	jt_eaton	5298d 20h	/socgen/
11	moved bsdl files renamed ucf file	jt_eaton	5304d 15h	/socgen/