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[/] [socgen/] - Rev 79

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Rev Log message Author Age Path
79 removed unsupported code jt_eaton 5070d 01h /socgen/
78 removed unsupported fpga jt_eaton 5070d 01h /socgen/
77 now generate syn and cov Makefiles
leave log and out files in sim/run directory		 jt_eaton 5070d 01h /socgen/
76 added wave.save files
now generate sims Makefile and params.sim
leave sim log and vcd files in sim/run/directory		 jt_eaton 5072d 06h /socgen/
75 added linting using verilator jt_eaton 5075d 23h /socgen/
74 split out sw Makefile into projects /bin
split out _cpu into seperate component		 jt_eaton 5081d 04h /socgen/
73 removed dup png files jt_eaton 5089d 04h /socgen/
72 split T6502 into components
moved io_module into seperate project
removed liblists
direct loads filelists for sims and coverage
add hier type into xml files to generate verilog		 jt_eaton 5089d 06h /socgen/
71 ignore anything in work jt_eaton 5095d 22h /socgen/
70 ignore work jt_eaton 5095d 22h /socgen/
69 added work dir jt_eaton 5095d 22h /socgen/
68 moved to seperate components jt_eaton 5098d 22h /socgen/
67 updated installs jt_eaton 5098d 22h /socgen/
66 converted sims to use parameters
added msp and 6502 software installs		 jt_eaton 5099d 22h /socgen/
65 added params.sim to sims
updated install's		 jt_eaton 5104d 22h /socgen/
64 added support for Fedora 13 jt_eaton 5108d 21h /socgen/
63 added install config for Ubuntu 10.10 jt_eaton 5109d 04h /socgen/
62 fixed parameters from `defines jt_eaton 5112d 20h /socgen/
61 now generate dut files for coverage
removed use of lndir		 jt_eaton 5112d 21h /socgen/
60 moved alu_logic into seperate component jt_eaton 5113d 08h /socgen/

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