URL https://opencores.org/ocsvn/common/common/trunk

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[/] - Rev 28

Rev	Log message	Author	Age	Path
28	no message	bbeaver	8340d 02h	/
27	no message	bbeaver	8341d 01h	/
26	no message	bbeaver	8342d 00h	/
25	no message	bbeaver	8343d 02h	/
24	no message	bbeaver	8345d 03h	/
23	no message	bbeaver	8346d 03h	/
22	no message	bbeaver	8346d 06h	/
21	Added bookmarks.	lampret	8346d 19h	/
20	Some minor fixes. Document is now official version.	lampret	8346d 20h	/
19	no message	bbeaver	8348d 04h	/
18	no message	bbeaver	8349d 01h	/
17	Fixed link to specification_template.dot	lampret	8349d 10h	/
16	Added updated opencores coding guidelines. Added ver_plan.pdf and Specification template for Word.	lampret	8349d 11h	/
15	no message	bbeaver	8369d 08h	/
14	adding beginning LPM files	bbeaver	8381d 04h	/
13	This commit was manufactured by cvs2svn to create tag 'initial'.		8387d 04h	/
12	Major cleanup. Files are now compliant to Altera & Xilinx memories. Memories are now compatible, i.e. drop-in replacements. Added synthesizeable generic FPGA description. Created "generic_memories" cvs entry.	rherveille	8387d 04h	/
11	no message	bbeaver	8394d 02h	/
10	no message	bbeaver	8394d 02h	/
9	no message	bbeaver	8398d 01h	/