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Subversion Repositories ethmac10g

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Rev Log message Author Age Path
66 comments added fisher5090 6736d 12h /
65 bad coding style, but works, will be modified later fisher5090 6736d 15h /
64 no message fisher5090 6739d 01h /
63 remove pad function added, using xilinx vp20 -6 as target FPGA, passes post place and route simulation fisher5090 6739d 01h /
62 no message fisher5090 6739d 08h /
61 no message fisher5090 6739d 10h /
60 change rxd_in, rxc_in and rxclk_in signals'name to xgmii_rxd, xgmii_rxc and xgmii_rxclk fisher5090 6739d 10h /
59 first version fisher5090 6739d 11h /
58 configuration vector select inband fcs or not fisher5090 6739d 16h /
57 both inband fcs and no inband fcs are OK fisher5090 6739d 16h /
56 no message fisher5090 6740d 08h /
55 testbench for normal frame and error frame fisher5090 6740d 08h /
54 removed fisher5090 6740d 08h /
53 testbench for normal and error frame fisher5090 6740d 12h /
52 modified the rx_good_frame and rx_bad_frame timing sequence fisher5090 6740d 12h /
51 modified fisher5090 6742d 16h /
50 good version fisher5090 6742d 16h /
49 datasheet for receive module fisher5090 6742d 16h /
48 no message fisher5090 6743d 08h /
47 no message fisher5090 6743d 12h /

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