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Rev Log message Author Age Path
13 Fixed Register reads
Tightened up timing for register rd/wr
rudi 8457d 16h /
12 Changed Reset to be active high and async. rudi 8467d 18h /
11 *** empty log message *** rudi 8481d 05h /
10 Fixed the TMS register setup to be tight and correct. rudi 8489d 16h /
9 Many fixes for minor bugs that showed up in gate level simulations. rudi 8489d 16h /
8 - Changed IO names to be more clear.
- Uniquifyed define names to be core specific.
- Removed "Refresh Early" configuration
rudi 8512d 11h /
7 Added Directory Tree Description to README file rudi 8515d 10h /
6 Added Memory controller spec rudi 8524d 10h /
5 *** empty log message *** rudi 8524d 11h /
4 1) Changed Directory Structure
2) Fixed several minor bugs
rudi 8524d 11h /
3 This commit was manufactured by cvs2svn to create tag 'start'. 8601d 09h /
2 Created Directory Structure rudi 8601d 09h /
1 Standard project directories initialized by cvs2svn. 8601d 09h /

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