URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] - Rev 981

Rev	Log message	Author	Age	Path
981	First checkin.	lampret	8048d 11h	/
980	Removed sim.tcl that shouldn't be here.	lampret	8048d 11h	/
979	Removed old test case binaries.	lampret	8048d 11h	/
978	Added variable delay for SRAM.	lampret	8048d 11h	/
977	Added store buffer.	lampret	8048d 11h	/
976	Added store buffer	lampret	8048d 11h	/
975	First checkin	lampret	8048d 11h	/
974	Enabled what works on or1ksim and disabled other tests.	lampret	8048d 13h	/
973	generated cuc top scheduler builds without syntax errors; not tested yet	markom	8050d 17h	/
972	Interrupt suorces fixed.	simons	8050d 18h	/
971	Now even keyboard test passes.	simons	8050d 21h	/
970	Testbench is now running on ORP architecture platform.	simons	8051d 09h	/
969	Checking in except directory.	lampret	8052d 01h	/
968	Checking in utils directory.	lampret	8052d 01h	/
967	Checking in mul directory.	lampret	8052d 01h	/
966	Checking in cbasic directory.	lampret	8052d 01h	/
965	Checking in basic directory.	lampret	8052d 01h	/
964	Checking in support directory.	lampret	8052d 01h	/
963	This commit was manufactured by cvs2svn to create tag 'rel_2'.		8052d 01h	/
962	Fixed Xilinx trace buffer address. REported by Taylor Su.	lampret	8052d 01h	/