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Rev	Log message	Author	Age	Path
95	- Write back now only updates SR in case of a LOAD.	cwalter	6465d 16h	/
94	Added signal from ex stage to register lock unit for clearing all register locks when a branch is executed.	jlechner	6465d 17h	/
93	Changed behavior on branch. Current PC is immeadiately taken from ex stage alu result.	jlechner	6465d 17h	/
92	Added logic for inserting a nop instruction when the pipeline is cleared.	jlechner	6465d 17h	/
91	- Computed new SR values from ALU result.	cwalter	6465d 17h	/
90	Added output signal for clearing all register locks when a branch instruction is executed. This is necessary because the id stage could have locked registers for an instruction that is cleared out of the pipeline due to the branch.	jlechner	6465d 17h	/
89	Added input signal for clearing all register locks.	jlechner	6465d 17h	/
88	- Added new patch for assembler.	cwalter	6465d 18h	/
87	no message	cwalter	6465d 18h	/
86	- Added new example for a more complex loop.	cwalter	6465d 18h	/
85	Removed PC reset on clear_in signal. Clear_in only comes together with a branch, so it is sufficient branch immediately.	jlechner	6465d 20h	/
84	- PC value was wrong.	cwalter	6465d 20h	/
83	- sr_enable and lr_enable where incorrect.	cwalter	6465d 20h	/
82	- Updated drawings for memory.	cwalter	6465d 20h	/
81	- Changed to include barrel shifter.	cwalter	6465d 20h	/
80	- Fixed testbench to work with new barrel shifter.	cwalter	6465d 20h	/
79	- Added barrel shifter.	cwalter	6465d 20h	/
78	Added stall_in to sensitivity list.	jlechner	6465d 20h	/
77	- Fixed case.	cwalter	6465d 20h	/
76	- Changed order of some statements to improve readability.	cwalter	6465d 20h	/

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[/] - Rev 95

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