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Rev Log message Author Age Path
53 verilator test loop in makefile - same results as icarus julius 5674d 23h /
52 Enabled own printf function using UART as output julius 5674d 23h /
51 Added SystemC Uart model julius 5677d 13h /
50 Tracing enabled on Verilator model julius 5678d 03h /
49 Verilator model now builds OK. julius 5678d 11h /
48 Closer to working verilator build julius 5679d 03h /
47 Basic verilator model getting closer. Included more modules from the example by Jeremy Bennett. Final cplusplus executable from verilator output fails to link properly julius 5679d 07h /
46 Flash memory now also disabled when SDRAM disabled, which is by default. Ethernet now enabled by defining USE_ETHERNET, otherwise it is disabled by default. Default icarus tests now very fast due to this julius 5680d 11h /
45 Many updates including internal SRAM instead of SDRAM as default, so inclusion of the SRAM model, a new VMEM generation program, and script and testbench updates to allow the switching on and off for SDRAM, which as mentioned is now off by default julius 5681d 04h /
44 Beginnings of verilator build - much still to do but the design can now at least be verilated julius 5687d 07h /
43 Added some verilator lint controls, made icarus script much more concise. First stage of verilation now works julius 5687d 12h /
42 Fixed up to allow compilation with verilator. Mostly separation of modules into appropriate file names. However some vector declaration changes in the smii module has definitely broken it. julius 5688d 03h /
41 Removed duplicate or1200_defines.v and timescale.v files julius 5688d 06h /
40 Change name of file and module of orpsoc_top module julius 5688d 06h /
39 Removed auto logging of processor state, added option to enable it in makefile, documented way the tests are done in makefile and that should probably be moved to some readme at some point julius 5688d 08h /
38 Actually that last fix caused another bug. This, and the original, are now fixed. Dhrystone ICDC passes julius 5688d 10h /
37 Hacked a bug fix - probably due to DCache bugs which are due to be fixed - dhrystone-icdc test still does not complete julius 5689d 07h /
36 Couple of makefile updates julius 5689d 09h /
35 Fixed or1200_defines confusion julius 5689d 09h /
34 Fixed up couple of things. Changed way the test name is defined in sim Makefile julius 5689d 10h /

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