OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [bootloaders/] [orpmon/] [config.mk] - Rev 486

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
467 ORPmon - bug fixes and clean up. julius 5074d 02h /openrisc/trunk/bootloaders/orpmon/config.mk
463 ORPmon update julius 5075d 01h /openrisc/trunk/bootloaders/orpmon/config.mk
419 ORPmon: Fixed interrupt routines in reset.S so they are compatible with new
GCC port (skip over redzone).
Added some defines to easily switch what is done when an error vector
is executed.
Added ability to print out EPCR when crashing.
Changed linker script back to one which doesn't skip over holes in SPI
flash memories.
julius 5132d 01h /openrisc/trunk/bootloaders/orpmon/config.mk
375 ORPmon update for compatibility with OR toolchain 1.0rc1 julius 5179d 22h /openrisc/trunk/bootloaders/orpmon/config.mk
355 Adding CoreMark to ORPmon, updated Dhrystone test output julius 5194d 21h /openrisc/trunk/bootloaders/orpmon/config.mk
353 OR1200 RTL and ORPSoCv2 update, fixing Verilator build capability.
* or1200/rtl/verilog/or1200_sprs.v: Verilator public and access comments
* orpsocv2/rtl/verilog/components/or1200/or1200_sprs.v: ""
* or1200/rtl/verilog/or1200_ctrl.v: Verilator public and access comments
* orpsocv2/rtl/verilog/components/or1200/or1200_ctrl.v: ""
* or1200/rtl/verilog/or1200_except.v: Verilator public and access comments
* orpsocv2/rtl/verilog/components/or1200/or1200_except.v: ""
* orpsocv2/rtl/verilog/components/wb_ram_b3/wb_ram_b3.v: Some
Verilator related Lint issues fixed.

ORPSoCv2: Removed bus arbiter snooping functions from OrpsocAccess and
updated RAM model hooks for new RAM.
* orpsocv2/bench/sysc/include/Or1200MonitorSC.h: Remove arbiter snooping
* orpsocv2/bench/sysc/src/Or1200MonitorSC.cpp: ""
* orpsocv2/bench/sysc/include/OrpsocAccess.h: Remove arbiter snooping,
change include and classes for new RAM model.
* orpsocv2/bench/sysc/src/OrpsocAccess.cpp: ""

or_debug_proxy - fixing sleep and Windows make issues:
* or_debug_proxy/src/gdb.c: Removed all sleep - still to be fixed properly
* or_debug_proxy/Makefile: Remove VPI file when building on Cygwin (deprecated)

ORPmon play around, various changes to low level files.
julius 5195d 21h /openrisc/trunk/bootloaders/orpmon/config.mk
246 ORPmon update - compatiable with new GCC, added new spr-defs file, better tboot reliability julius 5211d 19h /openrisc/trunk/bootloaders/orpmon/config.mk
175 Moved orpmon into bootloaders julius 5261d 22h /openrisc/trunk/bootloaders/orpmon/config.mk
140 Changes to ORPMon, probably broke flash loading, improved TFTP julius 5267d 01h /openrisc/trunk/orpmon/config.mk
2 ME: imported orpmon & or1k_startup files marcus.erlandsson 5701d 03h /openrisc/trunk/orpmon/config.mk

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.