OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [autom4te.cache/] [traces.0] - Rev 599

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
556 or1ksim - added performance counters unit and test for it. julius 4938d 12h /openrisc/trunk/or1ksim/autom4te.cache/traces.0
552 or1ksim - cpu/ cleanup - remove dynamic execution model WIP, and dlx, or16 targets julius 4939d 20h /openrisc/trunk/or1ksim/autom4te.cache/traces.0
538 or1ksim updates. spr-def.h updates, Cygwin compile error fixes. julius 4966d 16h /openrisc/trunk/or1ksim/autom4te.cache/traces.0
457 or1ksim - couple of ethernet peripheral updates, fixup of ethernet regression test so all tests pass again. julius 5100d 16h /openrisc/trunk/or1ksim/autom4te.cache/traces.0
442 OR1Ksim - adding trace controlability by SIGUSR1 signal. julius 5117d 10h /openrisc/trunk/or1ksim/autom4te.cache/traces.0
436 Or1ksim ethernet TAP updates. Ethernet test still failing. julius 5127d 06h /openrisc/trunk/or1ksim/autom4te.cache/traces.0
428 or1ksim - adding preliminary PHY emulation to ethernet peripheral. julius 5137d 11h /openrisc/trunk/or1ksim/autom4te.cache/traces.0
418 Or1ksim - adding new option when configuring memories, "exitnops" julius 5145d 19h /openrisc/trunk/or1ksim/autom4te.cache/traces.0
233 New softfloat FPU and testfloat sw for or1ksim julius 5246d 08h /openrisc/trunk/or1ksim/autom4te.cache/traces.0
226 Orksim floating point support additions, spr-defs.h updates, newlib cache init routines updated julius 5249d 13h /openrisc/trunk/or1ksim/autom4te.cache/traces.0
202 Adding executed log in binary format capability to or1ksim julius 5262d 16h /openrisc/trunk/or1ksim/autom4te.cache/traces.0
60 Mark Jarvin's patches to support Mac OS X (Snow Leopard). jeremybennett 5468d 15h /openrisc/trunk/or1ksim/autom4te.cache/traces.0
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5680d 22h /openrisc/trunk/or1ksim/autom4te.cache/traces.0

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.