OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [or1ksim/] [doc/] [or1ksim.info] - Rev 147

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
143 Fix building for Cygwin with GCC 3.4.4 (Bug 1797). Fix breakpoints with instruction cache enabled (Bug 195). jeremybennett 5266d 03h /openrisc/trunk/or1ksim/doc/or1ksim.info
134 Updates for stable release 0.4.0 jeremybennett 5274d 07h /openrisc/trunk/or1ksim/doc/or1ksim.info
127 New config option to allow l.xori with unsigned operand. jeremybennett 5280d 03h /openrisc/trunk/or1ksim/doc/or1ksim.info
124 Overflow handling now in line with architecture manual. Tests added. jeremybennett 5280d 23h /openrisc/trunk/or1ksim/doc/or1ksim.info
123 Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. jeremybennett 5281d 03h /openrisc/trunk/or1ksim/doc/or1ksim.info
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5282d 00h /openrisc/trunk/or1ksim/doc/or1ksim.info
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5282d 20h /openrisc/trunk/or1ksim/doc/or1ksim.info
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5285d 00h /openrisc/trunk/or1ksim/doc/or1ksim.info
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5286d 23h /openrisc/trunk/or1ksim/doc/or1ksim.info
110 or1ksim make check should work without a libc in the or32-elf tools julius 5288d 01h /openrisc/trunk/or1ksim/doc/or1ksim.info
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5290d 00h /openrisc/trunk/or1ksim/doc/or1ksim.info
104 Candidate release 0.4.0rc4 jeremybennett 5293d 07h /openrisc/trunk/or1ksim/doc/or1ksim.info
100 Single precision FPU stuff for or1ksim julius 5302d 03h /openrisc/trunk/or1ksim/doc/or1ksim.info
99 Bug in test evaluation for library fixed. jeremybennett 5307d 01h /openrisc/trunk/or1ksim/doc/or1ksim.info
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5308d 02h /openrisc/trunk/or1ksim/doc/or1ksim.info
96 Various changes which had not been picked up in earlier commits. jeremybennett 5323d 10h /openrisc/trunk/or1ksim/doc/or1ksim.info
93 Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0. jeremybennett 5329d 00h /openrisc/trunk/or1ksim/doc/or1ksim.info
90 Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain). jeremybennett 5336d 00h /openrisc/trunk/or1ksim/doc/or1ksim.info
85 Bug 1773 (RSP usage with ELF image preloaded) fixed. jeremybennett 5336d 08h /openrisc/trunk/or1ksim/doc/or1ksim.info
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.		 jeremybennett 5336d 23h /openrisc/trunk/or1ksim/doc/or1ksim.info

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.