URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [or1ksim/] [peripheral/] [mc.c] - Rev 312

Rev	Log message	Author	Age	Path
224	Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg.	jeremybennett	5238d 07h	/openrisc/trunk/or1ksim/peripheral/mc.c
104	Candidate release 0.4.0rc4	jeremybennett	5295d 08h	/openrisc/trunk/or1ksim/peripheral/mc.c
98	Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller.	jeremybennett	5310d 03h	/openrisc/trunk/or1ksim/peripheral/mc.c
82	Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check". Incorporate Mark Jarvis's fixes for Mac OS X.	jeremybennett	5339d 00h	/openrisc/trunk/or1ksim/peripheral/mc.c
19	Initial commit of Or1ksim 0.3.0 into the new repository	jeremybennett	5669d 09h	/openrisc/trunk/or1ksim/peripheral/mc.c