OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [sim-config.c] - Rev 198

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
143 Fix building for Cygwin with GCC 3.4.4 (Bug 1797). Fix breakpoints with instruction cache enabled (Bug 195). jeremybennett 5202d 22h /openrisc/trunk/or1ksim/sim-config.c
100 Single precision FPU stuff for or1ksim julius 5238d 22h /openrisc/trunk/or1ksim/sim-config.c
93 Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0. jeremybennett 5265d 19h /openrisc/trunk/or1ksim/sim-config.c
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.
jeremybennett 5273d 18h /openrisc/trunk/or1ksim/sim-config.c
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5604d 04h /openrisc/trunk/or1ksim/sim-config.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.