OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [sim-config.c] - Rev 261

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
235 Removed support for old OpenRISC JTAG Remote Protocol. jeremybennett 5243d 07h /openrisc/trunk/or1ksim/sim-config.c
224 Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. jeremybennett 5248d 08h /openrisc/trunk/or1ksim/sim-config.c
220 Updated library interface to take a full command line (this will break all old code). Added -q/--quiet and --report-memory-errors flags to command line. Fixed all tests to match this. jeremybennett 5255d 00h /openrisc/trunk/or1ksim/sim-config.c
202 Adding executed log in binary format capability to or1ksim julius 5261d 04h /openrisc/trunk/or1ksim/sim-config.c
143 Fix building for Cygwin with GCC 3.4.4 (Bug 1797). Fix breakpoints with instruction cache enabled (Bug 195). jeremybennett 5278d 04h /openrisc/trunk/or1ksim/sim-config.c
100 Single precision FPU stuff for or1ksim julius 5314d 05h /openrisc/trunk/or1ksim/sim-config.c
93 Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0. jeremybennett 5341d 02h /openrisc/trunk/or1ksim/sim-config.c
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.
jeremybennett 5349d 01h /openrisc/trunk/or1ksim/sim-config.c
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5679d 10h /openrisc/trunk/or1ksim/sim-config.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.