URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [verilog/] [vpi/] [verilog/] [vpi_debug_defines.v] - Rev 180

Rev	Log message	Author	Age	Path
46	debug interfaces now support byte and non-aligned accesses from gdb	julius	5584d 00h	/openrisc/trunk/orpsocv2/bench/verilog/vpi/verilog/vpi_debug_defines.v
40	Added GDB server to verilog simulation via VPI and make target to build and run this model	julius	5664d 00h	/openrisc/trunk/orpsocv2/bench/verilog/vpi/verilog/vpi_debug_defines.v