OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [actel/] [ordb1a3pe1500/] [sim/] [bin/] [Makefile] - Rev 542

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
542 ORPSoC scripts cleanup. Now centralised.

Documentation updated for ml501's SPI programming, noting issues with ISE12.
julius 4945d 01h /openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/sim/bin/Makefile
492 ORPSoC VPI interface for modelsim and documentation update julius 5032d 09h /openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/sim/bin/Makefile
468 ORPSoC update:
Added USER_ELF and USER_VMEM options to reference design simulation scripts.
Changed use of absolute BOARD_PATH variable to simply BOARD relative to board path
ML501's board.h bootrom default now boot from SPI
julius 5075d 12h /openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/sim/bin/Makefile
449 ORPSoC - or1200_monitor.v additions enabling new experimental execution checks.

Replace use of "clean-all" with "distclean" as make rule to clean things.
julius 5102d 02h /openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/sim/bin/Makefile
411 Improved ethmac testbench and software.

Renamed some OR1200 library functions to be more generic.

Fixed bug with versatile_mem_ctrl for Actel board.

Added ability to simulate gatelevel modules alongside RTL modules
in board build.
julius 5141d 07h /openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/sim/bin/Makefile
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 5142d 20h /openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/sim/bin/Makefile

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.