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[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [wb_switch_b3/] [wb_switch_b3.v] - Rev 766

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360 First checkin of new ORPSoC set up - more to come, all but RTL tests temporarily broken julius 5206d 02h /openrisc/trunk/orpsocv2/rtl/verilog/wb_switch_b3/wb_switch_b3.v
351 OR1200 with icarus fixed up. MMu test fix, remove testfloat elf, adding new arbiter and RAM, may break verilator compatibility... TODO julius 5209d 02h /openrisc/trunk/orpsocv2/rtl/verilog/components/wb_switch_b3/wb_switch_b3.v

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