URL https://opencores.org/ocsvn/plasma/plasma/trunk

Subversion Repositories plasma

[/] [plasma/] [trunk/] [vhdl/] [ram.vhd] - Rev 437

Rev	Log message	Author	Age	Path
352		linus	6052d 12h	/plasma/trunk/vhdl/ram.vhd
350		root	6081d 07h	/plasma/trunk/vhdl/ram.vhd
344	Fixed compiler warning	rhoads	6152d 23h	/plasma/trunk/vhdl/ram.vhd
335	Use enable signal for byte_we	rhoads	6199d 22h	/plasma/trunk/vhdl/ram.vhd
260	Removed Xilinx use statements	rhoads	6532d 06h	/plasma/trunk/vhdl/ram.vhd
139	Major changes -- updated to Plasma Version 3	rhoads	7181d 20h	/plasma/trunk/vhdl/ram.vhd
132	Changed "GENERIC" string to "DEFAULT" to be Xilinx friendly.	rhoads	7661d 18h	/plasma/trunk/vhdl/ram.vhd
128	Reset all registers, constants now upper case.	rhoads	7799d 06h	/plasma/trunk/vhdl/ram.vhd
98	Fix size of GENERIC ram.	rhoads	8423d 16h	/plasma/trunk/vhdl/ram.vhd
85	Use ADDRESS_WIDTH when decoding mem_sel	rhoads	8523d 17h	/plasma/trunk/vhdl/ram.vhd
55	Altera	rhoads	8539d 23h	/plasma/trunk/vhdl/ram.vhd
48	Altera	rhoads	8550d 19h	/plasma/trunk/vhdl/ram.vhd
43	Renamed M-lite to Plasma	rhoads	8637d 20h	/plasma/trunk/vhdl/ram.vhd
39	Changed name to M-lite to avoid trademark issues.	rhoads	8670d 01h	/plasma/trunk/vhdl/ram.vhd
11	Added comment for DEBUG mode	rhoads	8700d 18h	/plasma/trunk/vhdl/ram.vhd
7	Made writes 4 cycles, improved mem_ctrl.vhd	rhoads	8712d 02h	/plasma/trunk/vhdl/ram.vhd
2	MIPS-lite CPU core	rhoads	8935d 00h	/plasma/trunk/vhdl/ram.vhd