URL https://opencores.org/ocsvn/raytrac/raytrac/trunk

Subversion Repositories raytrac

[/] [raytrac/] [branches/] [fp_sgdma/] [arith/] [meminvr.mif] - Rev 256

Rev	Log message	Author	Age	Path
238	wide multiplicator added to avoid optimization	jguarin2002	4472d 10h	/raytrac/branches/fp_sgdma/arith/meminvr.mif
196	raytrac+sg_dma+raytrac. Step One, the DPC is transformed. Now there are five instructions (check the design document), theres no full queue sync event, there are only four result queues and only 3 add fp 32 b adders rather than 4. Even it seems like a reduction has taken place, decodification efforts take place when decoding multiplexation from arithmetic blocks towards the resulting queues	jguarin2002	4533d 07h	/meminvr.mif
118	fp beta version reached a 17,5% logic cell starting at 450 LEs and finishing in 371 LEs for fadd32	jguarin2002	4865d 07h	/meminvr.mif
104	Square Root and inversion support	jguarin2002	4896d 04h	/meminvr.mif