URL https://opencores.org/ocsvn/sdr_ctrl/sdr_ctrl/trunk

Subversion Repositories sdr_ctrl

[/] [sdr_ctrl/] [trunk/] [rtl/] [core/] [sdrc_core.v] - Rev 13

Rev	Log message	Author	Age	Path
13	column bit are made progrmmable	dinesha	4697d 18h	/sdr_ctrl/trunk/rtl/core/sdrc_core.v
9	SDR Bus width parameter passing issue across the models are fixed	dinesha	4701d 18h	/sdr_ctrl/trunk/rtl/core/sdrc_core.v
4	Sdram controller RTL bug fixes done for 16bit SDR Mode	dinesha	4702d 16h	/sdr_ctrl/trunk/rtl/core/sdrc_core.v
3	SDRAM controller core files are checked in	dinesha	4709d 02h	/sdr_ctrl/trunk/rtl/core/sdrc_core.v