URL https://opencores.org/ocsvn/xgate/xgate/trunk

Subversion Repositories xgate

[/] [xgate/] [trunk/] [README.txt] - Rev 75

Rev	Log message	Author	Age	Path
74	Code cleanup, eliminated index 0 of input and output interrupts.	rehayes	5315d 00h	/xgate/trunk/README.txt
71	Added irq bypass registers to rtl, testbench and doc.	rehayes	5316d 03h	/xgate/trunk/README.txt
66	Fix testbench and RISC core related to debug mode and wait states.	rehayes	5336d 00h	/xgate/trunk/README.txt
61	Update to RISC block to fix DEBUG mode, testbench update	rehayes	5352d 23h	/xgate/trunk/README.txt
58	WISHBONE Bus update.	rehayes	5404d 22h	/xgate/trunk/README.txt
56	Extensive changes to testbench and the Xgate master bus interface and the way the RISC handles wait states.	rehayes	5421d 02h	/xgate/trunk/README.txt
51	Corrections to ADC and SBC instructions, First pass at documentaion instruction set details	rehayes	5436d 23h	/xgate/trunk/README.txt
44	Update for single program counter added, WISHBONE Slave bus word addressability and byte selection	rehayes	5470d 20h	/xgate/trunk/README.txt
41	Update for singel program counter added, WISHBONE Slave bus word addressability and byte selection	rehayes	5471d 23h	/xgate/trunk/README.txt
38	Nov 9 2009 update notes	rehayes	5500d 03h	/xgate/trunk/README.txt
23	Oct 7, 2009 Update	rehayes	5532d 22h	/xgate/trunk/README.txt
14	Sept 23 2009 Change update	rehayes	5546d 23h	/xgate/trunk/README.txt
5	Update for memory wait states, testbench and instruction decoder simplified for synthesis	rehayes	5559d 23h	/xgate/trunk/README.txt
2	Initial Checkin	rehayes	5567d 21h	/xgate/trunk/README.txt