URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [doc/] [Makefile] - Rev 86

Rev	Log message	Author	Age	Path
69	This implements the "new Instruction Set" architecture for the Zip CPU. It's a massive change set, that touches just about everything but probably not enough of everything. Please see the spec.pdf for a description of this new architecture.	dgisselq	3276d 17h	/zipcpu/trunk/doc/Makefile
68	Updated specification, includes well illustrated pipeline discussion.	dgisselq	3311d 17h	/zipcpu/trunk/doc/Makefile
47	Added some new graphics, includes the file for the Zip Bones system.	dgisselq	3357d 11h	/zipcpu/trunk/doc/Makefile
36	Lots of changes to increase processing speed and remove pipeline stalls. Removed the useless flash cache, replacing it with a proper DMA controller. "make test" in the main directory now runs a test program in Verilator and reports on the results.	dgisselq	3369d 20h	/zipcpu/trunk/doc/Makefile
24	Lots more changes to the spec. It's still not done, but it is more complete than before.	dgisselq	3401d 22h	/zipcpu/trunk/doc/Makefile
21	This update adds an incomplete version of the specification for the chip. I ned to come back to this and do a lot more writing, but it is a start.	dgisselq	3403d 18h	/zipcpu/trunk/doc/Makefile