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[/] [System09/] [trunk/] [rtl/] [System09_Digilent_ZyboZ20/] [system09.xise] - Rev 207

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Rev Log message Author Age Path
207 Updated design to pick up vdu8_spram (which uses parameterized ram for video memory instead of hard macros) davidgb 1391d 21h /System09/trunk/rtl/System09_Digilent_ZyboZ20/system09.xise
202 Updated Zybo design to reintroduce VDU8 driving the PmodVGA on pmod connectors JC+JD.
This version also uses PmodUSBUART on JE. To use PmodRS232 you must edit the .ucf file and select the appropriate pin LOCs.
davidgb 1391d 22h /System09/trunk/rtl/System09_Digilent_ZyboZ20/system09.xise
200 Started adding back in video support - VDU8 instantiated and RGBHV bits sent to Pmod JE port. davidgb 1405d 14h /System09/trunk/rtl/System09_Digilent_ZyboZ20/system09.xise
187 Partially works. Garbage on the ACIA due to baud clock problems. davidgb 1420d 15h /System09/trunk/rtl/System09_Digilent_ZyboZ20/system09.xise
178 work on constraints file davidgb 1421d 08h /System09/trunk/rtl/System09_Digilent_ZyboZ20/system09.xise
177 work on zybo port davidgb 1421d 08h /System09/trunk/rtl/System09_Digilent_ZyboZ20/system09.xise
165 initial checkin for zybo z20. Still need to fix ucf file. davidgb 1424d 09h /System09/trunk/rtl/System09_Digilent_ZyboZ20/system09.xise

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